1. Field of the Invention
The invention relates generally to broadband switch architecture and, more particularly, to a system and method for synchronizing the timing between line cards and switch cards in a broadband switch.
2. Description of the Related Art
As noted in U.S. Pat. No. 6,188,687 (Mussman et al.), networks transfer electronic information between different locations. Broadband networks may convey broadcast-like video distribution, individual access to video program libraries, video telephone, video conferencing, and the like. Any one of such services may, for example, communicate signals having data transfer rates higher than 50 Mb/s.
In order to effectively serve a large number of customers, a broadband network includes switching nodes. At switching nodes, broadband signals are routed along selected paths so that desired signals are delivered from signal sources to targets (destinations). Numerous problems are faced by a broadband, real-time switch that accommodates a large number of connections. These problems result, at least in part, from the high data transfer rates associated with broadband communications. In short, a tremendous amount of data need to be processed or otherwise transferred through the switch during every unit of time, and the larger the number of connections supported by the switch, the greater the amount of data which need to be processed.
A practical broadband switch should be able to efficiently support a variety of communication services, whether or not such services require unidirectional or bidirectional signal traffic. For example, bidirectional services such as video conferencing and other interactive services that utilize point-to-point connections. Unfortunately, switching systems designed to efficiently handle broadcast-like communications may not be capable of efficiently supporting bidirectional signal traffic, and vice versa. Such systems may not be able to adapt to long term trends in upstream and downstream signal traffic demand. In addition, conventional network switches may not be able to adapt to large or rapid variations in the amount of upstream versus downstream traffic.
An adaptable network switch may require less switching hardware than a rigidly designed switch having equivalent switching capabilities. A reduction in the number of physical components is desirable to conserve space and to lower engineering, manufacturing, and maintenance costs. For example, given a specific mix of upstream and downstream switching capacities, a switching circuit that adapts to upstream and downstream traffic volume requires fewer components than an equivalent switching circuit that employs a fixed number of upstream circuits and a fixed number of downstream circuits. If the actual volume of upstream and downstream traffic is not proportional to the respective number of fixed upstream and downstream circuits, then the circuits are not optimally allocated and switching capacity is wasted.
Switching capacity is also wasted when communication signals are delivered to a network switch without being requested from a downstream customer. Switching circuits become busy with signal traffic and the probability of blocking increases when signals are unnecessarily brought down to the network switch. The frequency of signal blocking can also increase if traffic volume is not evenly distributed among unoccupied or sparsely-occupied switching circuits. In addition, switching speed may be sacrificed if the network switch distributes signal traffic in a random or unstructured manner.
As noted in U.S. Pat. No. 5,796,795 (Mussman et al.), at broadband data rates, every data signal path within the switch acts like a transmission line having a delay proportional to its length and being subject to interference from signals which can cause timing or phase distortions. Thus, each data signal transferred through the switch has an optimum bit synchronization timing arrangement which defines when data can most reliably be extracted from the data signal's path. Moreover, this timing may vary from signal to signal, depending upon the physical connection path a given data signal follows through the switch at any given moment. If a clock signal is used to define bit timing for the signals, then the clock signal also experiences its own such distortions. Thus, optimal clocking in spite of timing distortions in data and clock paths is difficult to achieve over a large number of connections.
Furthermore, physically larger switches experience worse timing distortions because physically larger switches have longer signal paths. Propagation delays vary from signal to signal and clock to clock through switch fabric components and/or the transmission line signal paths that interconnect the components.
One conventional solution to the timing problem is to extract a clock signal from each data signal path at the points in the switch where the data need to be extracted. However, this solution is undesirably complex because it requires one or more clock recovery circuits associated with each data signal path, and the complexity increases as the number of connections increases. Consequently, this solution leads to decreased reliability and increased cost. Moreover, the increased complexity necessitated by an excessive number of clock recovery circuits requires physical switch power consumption and implementation space to increase, and these increases further exacerbate the timing problem.
Another conventional solution to the timing problem is to process data in parallel rather than serially. For example, rather than switch single-bit serial data streams at a bit rate, a “parallel” switch can switch two-bit serial data streams at one-half the bit rate to achieve the same data throughput or more than two-bit serial streams at even lower bit rates to achieve the same data throughput. Unfortunately, this solution increases complexity by requiring proportionally more at least twice the number of components and interconnections, and it further exacerbates the timing problem by requiring proportionally more physical implementation space.
A switch or a switching node as defined herein includes at least two major components. They are line cards, connected to other switching nodes or destinations to transmit and receive information packets, and switch cards to transfer the information packets between the line cards. Each switch card typically includes a crossbar switch, or series of parallel crossbar switches having a plurality of inputs and outputs that can connected upon command. The line cards are linked through the switch card crossbars. Each switch card includes an associated arbiter to make the crossbar connection decisions.
A number of problems can result if proper synchronization is not maintained between the line cards and switch cards. For example, the requests to the switch cards from the line cards, to access a crossbar connection to another line card, require that the timing between the line cards and switch cards be synchronized. Likewise, the acknowledgements from the switch cards to the line cards require synchronized communications. The transfer of information by frames, and the tracking of the frames being transferred requires a common timing base between line and switch cards. Further, a line card may service the various crossbars of a switch card in a round robin type fashion, which once again requires synchronization. In applications that reserve bandwidth, with preprogrammed connections that bypass the bid request/acknowledgement handshaking, synchronized timing becomes even more critical.
It would be advantageous if line cards could be synchronized to switch cards without adding additional overhead to the information link between the cards. Further it would be advantageous if the synchronization could be performed on an auxiliary communication link between the line cards and the switch cards.
It would be advantageous if line cards could be replaced and resynchronized without reinitializing the switch host.
It would be advantageous if switch cards could be replaced and resynchronized without reinitializing the switch host.